Scalable Synchronization Research Group

Staff

Alumni

Nir Shavit, full-time member (on and off for more than a decade), now at MIT
Aleksandar Dragojevic, intern (summer '10)
Yossi Lev, intern ('04 - '10)
Dan Nussbaum, full-time member ('04 - '10)
Marek Olszewski, extern (January '09), intern (summer '09)
Kevin Moore, full-time member ('07 - '08)
Alexandra Fedorova, intern ('03 - '06)
Ori Shalev, intern ('04 - '06)
Virendra J. Marathe, intern (summer '05)
Simon Doherty, intern (summer '03)
Bill Scherer, intern (summer '02)

Publications

Mission

The Scalable Synchronization Research Group at Oracle Labs is exploring hardware and software mechansisms for facilitating the easy development of correct, efficient, and scalable concurrent programs. This goal is increasingly important as multicore computing becomes ubiquitous, and increasingly difficult as systems become larger. Since being acquired by Oracle in 2010, we have continued our research in these areas, and we are also exploring ways in which techniques developed by us and others may be successfully exploited in Oracle's products, particularly databases. See our official project page for more detail.

News and events

• NEW! July 7, 2011 Wow, time flies when you're having fun, and it's been over a year since we updated this page. Ooops. No, we have not been goofing off at the beach (much). We've been hard at work, continuing with our research, as well as getting to know some of our 70,000 new friends better, and exploring ways in which our research might help to improve Oracle products. We have finally remembered to update our publications page, so you can check out some of what we've been up to.
  
  
• June 30, 2011 Nir Shavit has accepted a position at MIT. We will miss him, even though he will be just down the road. Good luck Nir, and thanks for everything!
  
  
• May 6, 2010 Version 4.0.16 of the SkySTM library is available for download at the SkySTM-interest google group. See announcement here.
  
  
• October 27, 2009 Our technical report reporting on our experience with the hardware transactional memory (HTM) feature of Sun's multicore chip code named Rock is finally released! This report extends our ASPLOS 2009 paper with significant additional detail about Rock and our work with it. It shows substantial potential benefit for HTM as well as highlighting challenges we faced in using it, information to help programmers address such problems in some cases, and suggestions for how similar future features could improve on Rock's HTM feature.
  
  
• August 5, 2009 We are happy to release the first version of the Draft Specification of Transactional Language Constructs for C++. This specification is the result of a joint work by a group of people from Intel, IBM and Sun, and is based on our experience working with transactional language constructs. We would like to encourage people to implement this specification and we welcome feedback on the document. Please direct any such feedback to the TM and Languages Discussion Group.
  
  
• April 29, 2009 SSRG announces the open source release of the Hybrid Transactional Memory Library (SkySTM). SkySTM, which is intended to be targeted by an upcoming compiler release (not yet available), is highly configurable, supporting a variety of implementation choices including compilation with/without implicit privatization support, invisible/semivisible reads, eager/lazy write acquisition, etc. In addition, SkySTM can be run as a standalone Software Transactional Memory (STM) or as a hardware/software hybrid targeting the forthcoming Rock Processor's Hardware Transactional Memory feature (see here) -- as such, it can run Phased Transactional Memory (PhTM), or (eventually) Hybrid Transactional Memory (HyTM) (HyTM support not yet available). To gain access to SkySTM, please join the SkySTM Interest Google Group.
  
  
• January 15, 2009 The final version of our ASPLOS 2009 paper Early Experience with a Commercial Hardware Transactional Memory Implementation is available.
  
  
• June 4, 2008 A beta release of a revised version of the DSTM2 package is available from here. It includes some bug fixes, and some improvements and new features, including transactional boosting. Feedback is welcome; please send email to dstm2-feedback@sun.com.
  
  
• February 28, 2008 SSRG announces the open source release of the Adaptive Transactional Memory Test Platform (ATMTP), a simulator that allows researchers and developers to experiment with the Hardware Transactional Memory feature of the forthcoming multicore processor code named Rock.
  
  
• February 23, 2008 We presented two papers at Transact 2008 about the Adaptive Transactional Memory Test Platform (ATMTP). Check out our papers here.
  
  
• February 22, 2008 Yossi Lev and Jan Maessen were awarded the Best Paper Award at PPoPP 2008 for their paper Split Hardware Transactions: True Nesting of Transactions Using Best-Effort Hardware Transactional Memory. Congratulations!
  
  
• August 13, 2007 Marc Tremblay gave a keynote speech at the 2007 ACM Symposium on Principles of Distributed Computing, in which he announced that Sun's forthcoming Rock processor will support a form of best-effort hardware transactional memory. See this article in The Register.
  
  
• August 13, 2007 A Sun Labs Spotlight Article on Transactional Memory describes our group, our work, and our collaborations with others.
  
  
• June 14, 2007 Mark Moir gave a talk at Google describing Sun's work on transactional memory.