VLSI Research Group

In 1990, Sun Microsystems formed Sun Labs by acquiring the consulting firm of Sutherland, Sproull, and Associates. That year, Ivan Sutherland and Bob Sproull founded the Asynchronous Circuits Research Group in Sun Labs to continue their work in understanding and applying asynchronous circuits to system design. Ivan and Bob became Sun Fellows and Vice Presidents. Later, the group changed its name to the "VLSI Research Group" and broadened its research scope; in 2006, Bob became the Director of Sun Labs; and in 2009, Ivan retired.

Oracle acquired Sun Microsystems in early 2010, and with it Sun Labs, as its first research organization. Our charter, to develop advanced technologies to improve downstream Oracle products, remains the same, although our name was changed to "Oracle Labs" in November 2010. Oracle Vice-President Bob Sproull retired in 2011.

Our research group develops high-performance and low-energy VLSI technologies and design methods and demonstrates them with fabricated silicon test chips. Our aim is to provide solutions to the challenging problems that Oracle's systems designers will face in future designs.

We have active efforts in the following broad areas. Please see our publications page for our papers.

Note that we do not build products. Instead, our goal is to provide the systems designers at Oracle with tools and technology options for their future designs. We take risks, and expect that some of our efforts will fail--after all, if a technology is certain, it's not a research topic.

I. Communication research

In modern chip designs, the design challenge is no longer in computation, but rather in communication. Chip architects and designers spend most of their efforts pushing bits between cores and caches, between caches and dynamic memories, and between memories and high-capacity storage (for example, flash or disk). The problems are many, and complex, and nearly all computer systems are limited by the long latency, insufficient bandwidth, or excessive power of communication links.

This problem has been evident for a number of years now. We've focused on multiple solutions: by improving on-chip wires and examining networks on a chip; by developing a capacitively coupled chip-to-chip interconnect we call Proximity Communication; and by pushing (in partnership with DARPA) the limits of technology with silicon nanophotonics.

II. Large-scale computer systems research

Large-scale computer systems, used for applications such as databases, on-line transactions processing, and decision support systems, present challenges in best using memory and storage, interconnects, and power-efficient computing. In challenging traditional designs, we are now rethinking how to architect such systems, using new physical and logical structures for memory and computation.

This is a new, exciting, and growing area of work in our group, and consists of explorations at every level: silicon, boards, firmware, system architecture, and software.

III. Optimization research

In the early 90s, Ivan Sutherland and Bob Sproull published the first paper on the technique of "logical effort," for estimating the delay of a CMOS circuit. Used properly, it helps to select the size and number of gates required to minimize the delay of a circuit. As chip power has grown in importance, designers no longer wish to optimize purely for speed, but rather for a minimum of both circuit energy and delay. This problem has grown exponentially in complexity, as transistor counts continue to double with Moore's Law and as technology constraints have continued to increase.

Recent advances in convex optimization promise to reduce complex design questions to efficiently-solvable mathematical problems. We are now applying these techniques to the design of CMOS circuits, extending logical effort to include wire loads, area constraints, and energy optimization to dramatically improve not only circuit performance and energy but also designer productivity.

IV. CAD research

Most of the design community in places like Silicon Valley rely heavily on commercial chip-design tools from companies like Cadence, Synposys, and Mentor Graphics. Oracle's processor design teams are no exception. However, our group has built, and continues to develop, a fully Java-based open-source chip design environment, called Electric.

Electric is robust, fully-featured, extensible, and allows schematic capture, layout, design rule checking (DRC), layout-vs-schematic, simulation waveform viewing, and electrical rule checks, all in a unified user interface. We use it for our own testchips, which include tens of millions of transistors.

This development gives us a custom design environment for the same cost as supporting commercial design software. We find this crucial when new research areas expose new design tool needs. Some examples: how can you verify circuits when they connect through capacitive coupling? Can we create DRC or other usage rules for optical devices that interface with CMOS circuits? How can we share a central chip database securely among designers around the world?

Electric is used in academia and small industry worldwide. As silicon technologies become increasingly omnipresent in the fabric of everyday life, the need for a freely-available and customizable silicon design tool such as Electric will play a useful role.

V. Reliability research

As technologies scale and the number of transistors on a chip grow to the billions, the fault-tolerance of our systems must improve to keep pace. Soft errors, such as those caused by the impact of cosmic rays, can and do take down small systems (have you ever had your laptop crash while on an airplane flight?), but they must not crash a large commercial server. System reliability, availability, and serviceability--simply called "RAS" in the industry--in the face of soft errors, transistor aging, and wire degradation, must remain constant.

VI. University and government collaborations and outreach

We work closely with several universities, and have sponsored promising research at Stanford University, the University of British Columbia, Harvard University, the University of Michigan, and Carnegie-Mellon University. We collaborate with faculty at these and other institutions, including the University of California at Berkeley, CalTech, and Harvey-Mudd College. Some of us teach graduate classes at Stanford University on the side. These interactions keep us "plugged in" to the latest academic research activities, helping us to improve our own programs. It also grows Oracle's mindshare in the academic community, which helps cultivate a new generation of Oracle's customers.

We also work closely with several agencies in the U.S. Government. Our program in Proximity Communication was a foundation of Sun's $55M contract with DARPA for high-productivity computing systems (2003-2007). In 2007, our group, working hand-in-hand with other groups within Sun, beat out all other industrial bidders for a $50M contract with DARPA to develop silicon nanophotonics (optics in a chip) for future advanced computer systems; this phase of the program began in 2008 and will run for five years. These are just two of many former and ongoing collaborations with a diverse set of government agencies.

VII. Technical conference leadership

Our group members hold many influential positions in international technology communities, such as conference and workshop committees, journal editing boards, and international prize juries. This serves to raise Oracle's profile in the technology community, and provides an invaluable tool for recruiting the next generation of hardware and software designers to Oracle.