Backlog Aware Low Complexity Schedulers for Input Queued Packet Switches
Backlog Aware Low Complexity Schedulers for Input Queued Packet Switches
A. Dua, N. Bambos, W. Olesinski, H. Eberle, N. Gura
22 August 2007
Symposium on High-Performance Interconnects (Hot Interconnects), Stanford University
Venue : N/A