Design Considerations of Monolithically Integrated Voltage Regulators for Multicore Processors

Design Considerations of Monolithically Integrated Voltage Regulators for Multicore Processors

Hesam Fathi Moghadam, Ji Eun Jang, Michael Dayringer, Ben Rak Amnouykit, Guanghua Shu, Anatoly Yakovlev, Yue Zhang, Robert Hopkins

13 October 2017

Presented in this paper are design considerations for a Monolithically Integrated Voltage Regulator (MIVR) targeting a 42mm2 multicore processor test chip taped-out in TSMC 28nm process. This is the first work discussing the utilization of on-die magnetic core inductors to support >50A of load current. 64 inductors with switching frequency of 140MHz are strategically grouped into 8 interleaving phases to achieve 85% efficiency and minimize on-die voltage drop.


Venue : International Symposium on Circuits and Systems (ISCAS) 2018