A many-core architecture for in-memory data processing.
A many-core architecture for in-memory data processing.
Sandeep R. Agrawal, Sam Idicula, Arun Raghavan, Evangelos Vlachos, Venkatraman Govindaraju, Venkatanathan Varadarajan, Cagri Balkesen, Georgios Giannikis, Charlie Roth, Nipun Agarwal, Eric Sedlar
01 September 2017
Venue : MICRO
External Link: https://doi.org/10.1145/3123939.3123985