The Scalable Synchronization Research Group (SSRG) is focused on principles and techniques for developing concurrent programs that are scalable, efficient, and correct.

We refer to scalability broadly, applying our expertise to a wide range of performance problems across various environments, from user and OS kernel code running on large multi-sockets machines with shared memory to distributed applications running on multiple computing nodes in the cloud. Our methods include novel (read-write, NUMA-aware, energy-efficient) lock implementations, efficient concurrent data structures, scalable memory allocation and management, etc. The results of our research have been published in premier conferences as well as got integrated into numerous Oracle products.

In addition, we are interested in exploring and understanding the fundamental ramifications of various hardware features (such as hardware transactional memory (HTM), non-volatile memory (NVM), remote direct memory access (RDMA) support, etc.) on the properties of synchronization algorithms and concurrent data structures. We also have strong expertise in the specification and verification of concurrent algorithms, which is important because the kinds of synchronization algorithms we use to improve the system performance are often intricate and subtle.

Mission

The Scalable Synchronization Research Group at Oracle Labs is exploring hardware and software mechansisms for facilitating the easy development of correct, efficient, and scalable concurrent programs. This goal is increasingly important as multicore computing becomes ubiquitous, and increasingly difficult as systems become larger. Since being acquired by Oracle in 2010, we have continued our research in these areas, and we are also exploring ways in which techniques developed by us and others may be successfully exploited in Oracle's products.

ALUMNI

• Pantea Zardorshti, intern (summer '17)
• Victor Miraldo, intern (summer '17)
• Isaac Sheff, intern (summer '16)
• Trevor Brown, intern (summer '15)
• Maya Arbel, intern (summer '15)
• Joe Izraelevitz, intern (summer '14)
• Justin Kopinsky, intern (summer '14)
• Tim Merrifield, intern (summer '13)
• Yujie Liu, intern (summer '12 - '13)
• Nir Shavit, full-time member (on and off for more than a decade), now at MIT
• Mohsen Lesani, intern (winter '12)
• Irina Calciu, intern (summer '11)
• Aleksandar Dragojevic, intern (summer '10)
• Yossi Lev, intern ('04 - '10)
• Dan Nussbaum, full-time member ('04 - '10)
• Marek Olszewski, extern (January '09), intern (summer '09)
• Kevin Moore, full-time member ('07 - '08)
• Alexandra Fedorova, intern ('03 - '06)
• Ori Shalev, intern ('04 - '06)
• Virendra J. Marathe, intern (summer '05)
• Simon Doherty, intern (summer '03)
• Bill Scherer, intern (summer '02)

• Generic Concurrency Restriction - slides for the Dagstuhl seminar
  Alex Kogan, Dagstuhl seminar on “New Challenges in Parallelism”

• Improving Parallelism in Hardware Transactional Memory
  Dave Dice, Maurice Herlihy, Alex Kogan, ACM Transactions on Architecture and Code Optimization (TACO)

• Malthusian Locks - slides for EuroSys 2017
  Dave Dice, EuroSys 2017

• Towards Understandable Smart Contracts
  Harold Carr, Davin Fifield, Chris Flemming, Mark Moir, Bill Xie, Slides for Symposium on Distributed Ledger Technology (SDLT2017), Griffiths University, Gold Coast, Australia, June 13, 2017.

• Transactional Lock Elision Meets Combining
  Alex Kogan, Yossi Lev, ACM Symposium on Principles of Distributed Computing (PODC)

• Transactional Lock Elision Meets Combining.
  Alex Kogan, Yossi Lev, PODC 2017

• Fast non-intrusive memory reclamation for highly-concurrent data structures
  Dave Dice, Maurice Herlihy, Alex Kogan, ISMM 2016

• Investigating the Performance of Hardware Transactions on a Multi-Socket Machine
  Trevor Brown, Alex Kogan, Victor Luchangco, Yossi Lev, SPAA 2016

• Malthusian Locks
  Dave Dice, PPoPP 2017

• Primus Inter Pares: Improving Parallelism in Hardware Transactional Memory
  Dave Dice, Maurice Herlihy, Alex Kogan, ACM/IEEE International Symposium on Computer Architecture (ISCA)

• Refined transactional lock elision
  Dave Dice, Alex Kogan, Yossi Lev, PPOPP 2016

• Lock Cohorting: A General Technique for Designing NUMA Locks.
  David Dice, Virendra J. Marathe, Nir Shavit, TOPC 1(2):13 (2015)

• The Influence of Malloc Placement on TSX Hardware Transactional Memory.
  Dave Dice, Tim Harris, Alex Kogan, Yossi Lev, CoRR abs/1504.04640 (2015)

• Adaptive Integration of Hardware and Software Lock Elision Techniques.
  Dave Dice, Alex Kogan, Yossi Lev, Timothy Merrifield, Mark Moir, SPAA 2014

• Brief announcement: persistent unfairness arising from cache residency imbalance.
  Dave Dice, Virendra J. Marathe, Nir Shavit, SPAA 2014:82-83

• Hardware extensions to make lazy subscription safe
  Dave Dice, Tim Harris, Alex Kogan, Yossi Lev, Mark Moir, Extended version of our WTTM 2014 paper.

• Pitfalls of lazy subscription
  Dave Dice, Tim Harris, Alex Kogan, Yossi Lev, Mark Moir, 6th Workshop on the Theory of Transactional Memory (WTTM 2014)

• The Future(s) of Shared Data Structures.
  Alex Kogan, Maurice Herlihy, PODC 2014

• Constrained Data-Driven Parallelism
  Tim Harris, Yossi Lev, Victor Luchangco, Virendra Marathe, Mark Moir, In Proceedings, (2013)

• Lightweight Contention Management for Efficient Compare-and-Swap Operations
  Dave Dice, Danny Hendler, Ilya Mirsky, CoRR abs/1305.5800 (2013)

• Lightweight Contention Management for Efficient Compare-and-Swap Operations.
  David Dice, Danny Hendler, Ilya Mirsky, Euro-Par 2013:595-606

• Message Passing or Shared Memory: Evaluating the Delegation Abstraction for Multicores.
  Irina Calciu, Dave Dice, Tim Harris, Maurice Herlihy, Alex Kogan, Virendra J. Marathe, Mark Moir, OPODIS 2013:83-97

• NUMA-aware reader-writer locks.
  Irina Calciu, David Dice, Yossi Lev, Victor Luchangco, Virendra J. Marathe, Nir Shavit, PPOPP 2013:157-166

• Scalable statistics counters (Poster)
  Dave Dice, Yossi Lev, Mark Moir, PPoPP 2013

• Scalable statistics counters.
  Dave Dice, Yossi Lev, Mark Moir, SPAA 2013:43-52

• Towards formally specifying and verifying transactional memory.
  Simon Doherty, Lindsay Groves, Victor Luchangco, Mark Moir, Formal Asp. Comput. (FAC) 25(5):769-799 (2013)

• Using hardware transactional memory to correct and simplify and readers-writer lock algorithm.
  Dave Dice, Yossi Lev, Yujie Liu, Victor Luchangco, Mark Moir, PPOPP 2013:261-270

• A Framework for Formally Verifying Software Transactional Memory Algorithms.
  Mohsen Lesani, Victor Luchangco, Mark Moir, CONCUR 2012:516-530

• Lock cohorting: a general technique for designing NUMA locks.
  David Dice, Virendra Marathe, Nir Shavit, PPOPP 2012:247-256

• Brief announcement: a partitioned ticket lock.
  David Dice, SPAA 2011:309-310

• Brief announcement: multilane - a concurrent blocking multiset.
  David Dice, Oleksandr Otenko, SPAA 2011:313-314

• Cache index-aware memory allocation.
  Yehuda Afek, David Dice, Adam Morrison, ISMM 2011:55-64

• Flat-combining NUMA locks.
  David Dice, Virendra Marathe, Nir Shavit, SPAA 2011:65-74

• Formal Machine-Checked Verification of a Real Transactional Memory Algorithm
  Victor Luchangco, Slides, (2011)

• Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory.
  Luke Dalessandro, Francois Carouge, Sean White, Yossi Lev, Mark Moir, Michael Scott, Michael Spear, ASPLOS 2011:39-52

• On The Power of Hardware Transactional Memory to Simplify Memory Management
  Aleksandar Dragojevic, Maurice Herlihy, Yossi Lev, Mark Moir, Conference Publication, (2011)

• Revisiting Condition Variables and Transactions
  Victor Luchangco, Virendra Marathe, In Proceedings, (2011)

• Towards Formally Specifying and Verifying Transactional Memory
  Simon Doherty, Lindsay Groves, Victor Luchangco, Mark Moir, Article, (2011)

• Efficient Lock Free Privatization.
  Yehuda Afek, Hillel Avni, David Dice, Nir Shavit, OPODIS 2010:333-347

• Simplifying concurrent algorithms by exploiting hardware transactional memory.
  David Dice, Yossi Lev, Virendra Marathe, Mark Moir, Daniel Nussbaum, Marek Olszewski, SPAA 2010:325-334

• TLRW: return of the read-write lock.
  David Dice, Nir Shavit, SPAA 2010:284-293

• Transactional Mutex Locks.
  Luke Dalessandro, David Dice, Michael Scott, Nir Shavit, Michael Spear, Euro-Par 2010:2-13

• What Kinds of Applications Can Benefit from Transactional Memory?
  Mark Moir, Dan Nussbaum, Daniel Nussbaum, In Proceedings, (2010)

• You Are Not Alone: Breaking Transaction Isolation
  Victor Luchangco, Virendra Marathe, In Proceedings, (2010)

• Anatomy of a Scalable Software Transactional Memory
  Yossi Lev, Victor Luchangco, Marek Olszewski, Virendra Marathe, Mark Moir, Dan Nussbaum, In Proceedings, (2009)

• Early Experience with a Commercial Hardware Transactional Memory Implementation
  David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum, Marek Olszewski, Technical Report, (2009)

• Early experience with a commercial hardware transactional memory implementation.
  David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum, ASPLOS 2009:157-168

• Exceptions and Transactions in C++
  Adam Welc, Ali-Reza Adl-Tabatabai, Mark Moir, Mark Moir, Ravi Narayanaswamy, Victor Luchangco, Victor Luchangco, Xinmin Tian, Yang Ni, In Proceedings, (2009)

• Exceptions and Transactions in C++
  Adam Welc, Ali-Reza Adl-Tabatabai, Dan Nussbaum, Mark Moir, Peng Wu, Ravi Narayanaswamy, Victor Luchangco, Virendra Marathe, Xinmin Tian, Yang Ni, In Proceedings, (2009)

• NZTM: nonblocking zero-indirection transactional memory.
  Fuad Tabba, Mark Moir, James Goodman, Andrew Hay, Cong Wang, SPAA 2009:204-213

• Nonblocking Algorithms and Backward Simulation.
  Simon Doherty, Mark Moir, DISC 2009:274-288

• Nonblocking k-Compare-Single-Swap.
  Victor Luchangco, Mark Moir, Nir Shavit, In Proceedings, (2009)

• The adaptive transactional memory test platform: a tool for experimenting with transactional code for rock (poster).
  Mark Moir, Kevin Moore, Daniel Nussbaum, SPAA 2008:362

• Toward high performance nonblocking software transactional memory.
  Virendra Marathe, Mark Moir, PPOPP 2008:227-236

• A Lazy Concurrent List-Based Set Algorithm.
  Steve Heller, Maurice Herlihy, Victor Luchangco, Mark Moir, William Scherer III, Nir Shavit, Parallel Processing Letters (PPL) 17(4):411-424 (2007)

• Capabilities and Limitations of Library-Based Software Transactional Memory in C++
  Luke Dalessandro, Virendra Marathe, Michael Spear, Michael Scott, In Proceedings, (2007)

• Delaunay Triangulation with Transactions and Barriers
  Michael Scott, Michael Spear, Luke Dalessandro, Virendra Marathe, In Proceedings, (2007)

• Efficient nonblocking software transactional memory.
  Virendra Marathe, Mark Moir, PPOPP 2007:136-137

• Potential show-stoppers for transactional synchronization.
  Ali-Reza Adl-Tabatabai, David Dice, Maurice Herlihy, Nir Shavit, Christos Kozyrakis, Christoph von Praun, Michael Scott, PPOPP 2007:55

• SNZI: Scalable NonZero Indicators.
  Faith Ellen, Yossi Lev, Victor Luchangco, Mark Moir, PODC 2007:13-22

• Understanding Tradeoffs in Software Transactional Memory.
  David Dice, Nir Shavit, CGO 2007:21-33

• A dynamic-sized nonblocking work stealing deque.
  Danny Hendler, Yossi Lev, Mark Moir, Nir Shavit, Distributed Computing (DC) 18(3):189-207 (2006)

• A flexible framework for implementing software transactional memory.
  Maurice Herlihy, Victor Luchangco, Mark Moir, OOPSLA 2006:253-262

• Composite Abortable Locks.
  Virendra Marathe, Mark Moir, Nir Shavit, IPDPS 2006:1-10

• Formal Verification of a Lazy Concurrent List-Based Set Algorithm.
  Robert Colvin, Lindsay Groves, Victor Luchangco, Mark Moir, CAV 2006:475-488

• Hardware Acceleration of Software Transactional Memory
  Arrvindh Shriraman, Virendra Marathe, Sandhya Dwarkadas, Michael Scott, David Eisenstat, Christopher Heriot, William Scherer III, Michael Spear, In Proceedings, (2006)

• Hybrid transactional memory.
  Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir, Daniel Nussbaum, ASPLOS 2006:336-346

• Lowering the Overhead of Nonblocking Software Transactional Memory
  Virendra Marathe, Michael Spear, Christopher Heriot, Athul Acharya, David Eisenstat, William Scherer III, Michael Scott, In Proceedings, (2006)

• Transactional Locking II.
  David Dice, Ori Shalev, Nir Shavit, DISC 2006:194-208

• Concurrency and synchronization in Java programs.
  Mark Moir, Nir Shavit, Jan Vitek, Sci. Comput. Program. (SCP) 58(3):291-292 (2005)

• Dynamic-Sized Nonblocking Work Stealing Deque, A
  Danny Hendler, Yossi Lev, Mark Moir, Nir Shavit, Technical Report, (2005)

• Nonblocking memory management support for dynamic-sized data structures.
  Maurice Herlihy, Victor Luchangco, Paul Martin, Mark Moir, ACM Trans. Comput. Syst. (TOCS) 23(2):146-196 (2005)

• Obstruction-Free Algorithms Can Be Practically Wait-Free.
  Faith Ellen Fich, Victor Luchangco, Mark Moir, Nir Shavit, DISC 2005:78-92

• Obstruction-Free Step Complexity: Lock-Free DCAS as an Example.
  Faith Ellen Fich, Victor Luchangco, Mark Moir, Nir Shavit, DISC 2005:493-494

• Supporting per-processor local-allocation buffers using lightweight user-level preemption notification.
  Alex Garthwaite, David Dice, Derek White, VEE 2005:24-34

• Transaction Synchronizers
  Victor Luchangco, In Proceedings, (2005)

• Using LL/SC to SimplifyWord-based Software Transactional Memory
  Virendra Marathe, Michael Scott, In Proceedings, (2005)

• Using elimination to implement scalable and lock-free FIFO queues.
  Mark Moir, Daniel Nussbaum, Ori Shalev, Nir Shavit, SPAA 2005:253-262

• Bringing practical lock-free synchronization to 64-bit applications.
  Simon Doherty, Maurice Herlihy, Victor Luchangco, Mark Moir, PODC 2004:31-39

• DCAS is not a silver bullet for nonblocking algorithm design.
  Simon Doherty, David Detlefs, Lindsay Groves, Christine Flood, Victor Luchangco, Paul Martin, Mark Moir, Nir Shavit, Guy Steele Jr., SPAA 2004:216-224

• Design Tradeoffs in Modern Software Transactional Memory Systems
  Virendra Marathe, William Scherer III, Michael Scott, In Proceedings, (2004)

• Formal Verification of a Practical Lock-Free Queue Algorithm.
  Simon Doherty, Lindsay Groves, Victor Luchangco, Mark Moir, FORTE 2004:97-114

• Supporting Per-processor Local-allocation Buffers Using Multi-processor Restartable Critical Sections
  Derek White, David Dice, Alex Garthwaite, Technical Report, (2004)

• Nonblocking k-compare-single-swap.
  Victor Luchangco, Mark Moir, Nir Shavit, SPAA 2003:314-323

• Obstruction-Free Synchronization: Double-Ended Queues as an Example.
  Maurice Herlihy, Victor Luchangco, Mark Moir, ICDCS 2003:522-529

• On the Uncontended Complexity of Consensus.
  Victor Luchangco, Mark Moir, Nir Shavit, DISC 2003:45-59

• Software transactional memory for dynamic-sized data structures.
  Maurice Herlihy, Victor Luchangco, Mark Moir, William Scherer III, PODC 2003:92-101

• Space and Time Adaptive Non-blocking Algorithms.
  Maurice Herlihy, Victor Luchangco, Mark Moir, Electr. Notes Theor. Comput. Sci. (ENTCS) 78:260-280 (2003)

• DCAS-Based Concurrent Deques.
  Ole Agesen, David Detlefs, Christine Flood, Alexander Garthwaite, Paul Martin, Mark Moir, Nir Shavit, Guy Steele Jr., Theory Comput. Syst. (MST) 35(3):349-386 (2002)

• DCAS-based Concurrent Deques Supporting Bulk Allocation
  Mark Moir, Guy Steele, Paul Martin, Technical Report, (2002)

• Dynamic-sized Lockfree Data Structures
  Victor Luchangco, Paul Martin, Mark Moir, Maurice Herlihy, Technical Report, (2002)

• Dynamic-sized lock-free data structures.
  Maurice Herlihy, Victor Luchangco, Paul Martin, Mark Moir, PODC 2002:131

• Lock-free reference counting.
  David Detlefs, Paul Martin, Mark Moir, Guy Steele Jr., Distributed Computing (DC) 15(4):255-271 (2002)

• Mostly lock-free malloc.
  David Dice, Alex Garthwaite, MSP/ISMM 2002:269-280

• Repeat Offender Problem: A Mechanism for Supporting Dynamic-sized Lock-free Data Structures, The
  Maurice Herlihy, Victor Luchangco, Mark Moir, Technical Report, (2002)

• The Repeat Offender Problem: A Mechanism for Supporting Dynamic-Sized, Lock-Free Data Structures.
  Maurice Herlihy, Victor Luchangco, Mark Moir, DISC 2002:339-353

• A General Resource Allocation Synchronization Problem.
  Patrick Keane, Mark Moir, ICDCS 2001:557-564

• A Simple Local-Spin Group Mutual Exclusion Algorithm.
  Patrick Keane, Mark Moir, IEEE Trans. Parallel Distrib. Syst. (TPDS) 12(7):673-685 (2001)

• A simple proof technique for priority-scheduled systems.
  James Anderson, Mark Moir, Srikanth Ramamurthy, Inf. Process. Lett. (IPL) 77(2-4):63-70 (2001)

• Correction: practical implementations of non-blocking synchronization primitives.
  Mark Moir, PODC 2001:323

• Implementing Fast Java™ Monitors with Relaxed-Locks.
  David Dice, Java™ Virtual Machine Research and Technology Symposium 2001:79-90

• Laziness pays! Using lazy synchronization mechanisms to improve non-blocking constructions.
  Mark Moir, Distributed Computing (DC) 14(4):193-204 (2001)

• Laziness pays! using lazy synchronization mechanisms to improve non-blocking constructions.
  Mark Moir, PODC 2000:61-70

• Static-Priority Periodic Scheduling on Multiprocessors.
  Srikanth Rarnarnurthy, Mark Moir, IEEE Real-Time Systems Symposium 2000:69-78

• Pfair Scheduling of Fixed and Migrating Periodic Tasks on Multiple Resources.
  Mark Moir, Srikanth Ramamurthy, IEEE Real-Time Systems Symposium 1999:294-303

• Universal Constructions for Large Objects.
  James Anderson, Mark Moir, IEEE Trans. Parallel Distrib. Syst. (TPDS) 10(12):1317-1332 (1999)

• Wait-Free Synchronization in Multiprogrammed Systems: Integrating Priority-Based and Quantum-Based Scheduling.
  James Anderson, Mark Moir, PODC 1999:123-132

• Fast, Long-Lived Renaming Improved and Simplified.
  Mark Moir, Juan Garay, Sci. Comput. Program. (SCP) 30(3):287-308 (1998)

• Synchronization Mechanisms for SCRAMNet+ Systems.
  Stephen Menke, Mark Moir, Srikanth Ramamurthy, PODC 1998:71-80

• Practical Implementations of Non-Blocking Synchronization Primitives.
  Mark Moir, PODC 1997:219-228

• Transparent Support for Wait-Free Transactions.
  Mark Moir, WDAG 1997:305-319

• Using Local-Spin k-Exclusion Algorithms to Improve Wait-Free Object Implementations.
  James Anderson, Mark Moir, Distributed Computing (DC) 11(1):1-20 (1997)

• Fast, Long-Lived Renaming Improved and Simplified (Abstract).
  Mark Moir, Juan Garay, PODC 1996:152

• Lock-Free Transactions for Real-Time Systems.
  James Anderson, Srikanth Ramamurthy, Mark Moir, Kevin Jeffay, RTDB 1996:103-110

• Real-Time Object Sharing with Minimal System Support (Extended Abstract).
  Srikanth Ramamurthy, Mark Moir, James Anderson, PODC 1996:233-242

• Long-Lived Renaming Made Fast.
  Harry Buhrman, Juan Garay, Jaap-Henk Hoepman, Mark Moir, PODC 1995:194-203

• Universal Constructions for Multi-Object Operations.
  James Anderson, Mark Moir, PODC 1995:184-193

• Wait-Free Algorithms for Fast, Long-Lived Renaming.
  Mark Moir, James Anderson, Sci. Comput. Program. (SCP) 25(1):1-39 (1995)

• Fast, Long-Lived Renaming (Extended Abstract).
  Mark Moir, James Anderson, WDAG 1994:141-155

• Using k-Exclusion to Implement Resilient, Scalable Shared Objects (Extended Abstract).
  James Anderson, Mark Moir, PODC 1994:141-150

• Towards a Necessary and Sufficient Condition for Wait-free Synchronization (Extended Abstract).
  James Anderson, Mark Moir, WDAG 1993:39-53