- Refined transactional lock elision
- Dave Dice, Alex Kogan, Yossi Lev, PPOPP 2016
- Lock Cohorting: A General Technique for Designing NUMA Locks.
- David Dice, Virendra J. Marathe, Nir Shavit, TOPC 1(2):13 (2015)
- The Influence of Malloc Placement on TSX Hardware Transactional Memory.
- Dave Dice, Tim Harris, Alex Kogan, Yossi Lev, CoRR abs/1504.04640 (2015)
- Adaptive Integration of Hardware and Software Lock Elision Techniques.
- Dave Dice, Alex Kogan, Yossi Lev, Timothy Merrifield, Mark Moir, SPAA 2014
- Brief announcement: persistent unfairness arising from cache residency imbalance.
- Dave Dice, Virendra J. Marathe, Nir Shavit, SPAA 2014:82-83
- Lightweight Contention Management for Efficient Compare-and-Swap Operations
- Dave Dice, Danny Hendler, Ilya Mirsky, CoRR abs/1305.5800 (2013)
- Lightweight Contention Management for Efficient Compare-and-Swap Operations.
- David Dice, Danny Hendler, Ilya Mirsky, Euro-Par 2013:595-606
- Message Passing or Shared Memory: Evaluating the Delegation Abstraction for Multicores.
- Irina Calciu, Dave Dice, Tim Harris, Maurice Herlihy, Alex Kogan, Virendra J. Marathe, Mark Moir, OPODIS 2013:83-97
- NUMA-aware reader-writer locks.
- Irina Calciu, David Dice, Yossi Lev, Victor Luchangco, Virendra J. Marathe, Nir Shavit, PPOPP 2013:157-166
- Scalable statistics counters (Poster)
- Dave Dice, Yossi Lev, Mark Moir, PPoPP 2013
- Scalable statistics counters.
- Dave Dice, Yossi Lev, Mark Moir, SPAA 2013:43-52
- Using hardware transactional memory to correct and simplify and readers-writer lock algorithm.
- Dave Dice, Yossi Lev, Yujie Liu, Victor Luchangco, Mark Moir, PPOPP 2013:261-270
- Lock cohorting: a general technique for designing NUMA locks.
- David Dice, Virendra Marathe, Nir Shavit, PPOPP 2012:247-256
- Brief announcement: a partitioned ticket lock.
- David Dice, SPAA 2011:309-310
- Brief announcement: multilane - a concurrent blocking multiset.
- David Dice, Oleksandr Otenko, SPAA 2011:313-314
- Cache index-aware memory allocation.
- Yehuda Afek, David Dice, Adam Morrison, ISMM 2011:55-64
- Flat-combining NUMA locks.
- David Dice, Virendra Marathe, Nir Shavit, SPAA 2011:65-74
- Efficient Lock Free Privatization.
- Yehuda Afek, Hillel Avni, David Dice, Nir Shavit, OPODIS 2010:333-347
- Simplifying concurrent algorithms by exploiting hardware transactional memory.
- David Dice, Yossi Lev, Virendra Marathe, Mark Moir, Daniel Nussbaum, Marek Olszewski, SPAA 2010:325-334
- TLRW: return of the read-write lock.
- David Dice, Nir Shavit, SPAA 2010:284-293
- Transactional Mutex Locks.
- Luke Dalessandro, David Dice, Michael Scott, Nir Shavit, Michael Spear, Euro-Par 2010:2-13
- Early Experience with a Commercial Hardware Transactional Memory Implementation
- David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum, Marek Olszewski, Technical Report, (2009)
- Early experience with a commercial hardware transactional memory implementation.
- David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum, ASPLOS 2009:157-168
- Potential show-stoppers for transactional synchronization.
- Ali-Reza Adl-Tabatabai, David Dice, Maurice Herlihy, Nir Shavit, Christos Kozyrakis, Christoph von Praun, Michael Scott, PPOPP 2007:55
- Understanding Tradeoffs in Software Transactional Memory.
- David Dice, Nir Shavit, CGO 2007:21-33
- Transactional Locking II.
- David Dice, Ori Shalev, Nir Shavit, DISC 2006:194-208
- Supporting per-processor local-allocation buffers using lightweight user-level preemption notification.
- Alex Garthwaite, David Dice, Derek White, VEE 2005:24-34
- Supporting Per-processor Local-allocation Buffers Using Multi-processor Restartable Critical Sections
- Derek White, David Dice, Alex Garthwaite, Technical Report, (2004)
- Mostly lock-free malloc.
- David Dice, Alex Garthwaite, MSP/ISMM 2002:269-280
- Implementing Fast Java Monitors with Relaxed-Locks.
- David Dice, Java Virtual Machine Research and Technology Symposium 2001:79-90
- Implementing Fast Java Monitors with Relaxed-Locks.
- David Dice, Java Virtual Machine Research and Technology Symposium 2001:79-90
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